Complementary Metal Oxide Semiconductor (“CMOS”) technology is widely used for realizing semiconductor-based electronic circuits. CMOS circuits use both NMOS (electrons) and PMOS (holes) devices. Since a CMOS device-pair consumes power only during switching, CMOS chips require less power than chips using just one type of transistor. CMOS has been particularly attractive for use in battery-powered devices, such as portable computers.
CMOS technology integrates both n-type and p-type MOS devices on the same wafer chip. The current of a field effect transistor (“FET”) is proportional to the carrier mobility. PFET carrier mobility is known to be 2.5 times higher on a 110-oriented silicon (Si) wafer than on a 100-oriented Si wafer. Hence, it is desirable to create a hybrid substrate comprising 100-oriented Si where NFETs would be formed and 110-oriented Si where PFET would be formed.
The concept of using different orientations on the same semiconductor may be extended to using different semiconductor materials, since it may be advantageous to fabricate a hybrid substrate with different semiconductor compounds. For example, the bulk hole mobility of germanium (Ge) and the bulk electron mobility of gallium arsenide (GaAs) are, respectively, 4.2 and 5.7 times higher than that of 100-oriented silicon. Thus, a hybrid substrate comprising Ge regions where PFET's would be formed, and GaAs regions where NFET's would be formed may lead to a substantial improvement in FET currents.
Yet another example is related to monolithic integration of optoelectronic devices with CMOS technology. Since silicon has an indirect bandgap, it does not emit light as efficiently as semiconductor materials with a direct bandgap such as GaAs, InP, InGaAs, etc. It would therefore be desirable to fabricate a hybrid substrate comprising silicon regions where CMOS circuits would be formed and InP regions where optoelectronic devices would be formed.